IBIS Macromodel Task Group Meeting date: 07 October 2008 Members (asterisk for those attending): Ambrish Varma, Cadence Design Systems Anders Ekholm, Ericsson * Arpad Muranyi, Mentor Graphics Corp. Barry Katz, SiSoft * Bob Ross, Teraspeed Consulting Group Brad Brim, Sigrity Brad Griffin, Cadence Design Systems David Banas, Xilinx Donald Telian, consultant Doug White, Cisco Systems Essaid Bensoudane, ST Microelectronics * Fangyi Rao, Agilent Ganesh Narayanaswamy, ST Micro Gang Kang, Sigrity Hemant Shah, Cadence Design Systems * Ian Dodd, Agilent Joe Abler, IBM * John Angulo, Mentor Graphics John Shields, Mentor Graphics Ken Willis, Cadence Design Systems Kumar Lance Wang, Cadence Design Systems Luis Boluna, Cisco Systems Michael Mirmak, Intel Corp. * Mike LaBonte, Cisco Systems Mike Steinberger, SiSoft Mustansir Fanaswalla, Xilinx Patrick O'Halloran, Tiburon Design Automation Paul Fernando, NCSU * Pavani Jella, TI * Radek Biernacki, Agilent (EESof) * Randy Wolff, Micron Technology Ray Comeau, Cadence Design Systems Richard Mellitz, Intel Richard Ward, Texas Instruments Sam Chitwood, Sigrity Sanjeev Gupta, Agilent Shangli Wu, Cadence Design Systems Sid Singh, Extreme Networks Stephen Scearce, Cisco Systems Steve Pytel, Ansoft Syed Huq, Cisco Systems Syed Sadeghi, ST Micro Terry Jernberg, Cadence Design Systems * Todd Westerhoff, SiSoft Vikas Gupta, Xilinx Vuk Borich, Agilent * Walter Katz, SiSoft Zhen Mu, Cadence Design Systems ----- Opens: -------------------------- Call for patent disclosure: - No one declared a patent. ------------- Review of ARs: - Arpad: Write parameter passing syntax proposal (BIRD draft) for *-AMS models in IBIS that is consistent with the parameter passing syntax of the AMI models - TBD - TBD: Propose a parameter passing syntax for the SPICE - [External ...] also? - TBD - Arpad: Review the documentation (annotation) in the macro libraries. - Deferred until a demand arises or we have nothing else to do ------------- New Discussion: Todd reported on the latest meeting with Synopsys: - We asked for permission to use the syntax and copy from their documentation - They asked if there would be additional changes requested - They will ask their legal department - No concerns are expected - Mike L: Will they want to approve it word for word? - Todd: No one knows - Arpad: So now do we have permission to put it on our web site? - Todd: Probably, but we should confirm with Michael M AR: Todd check on permission for Mike L to post Interconnect SPICE syntax We took a look at the new C_comp circuit proposal - Slide 19 was shown - Mike L: Any change should address state dependency well - Simulators will have a hard time if different circuits are used - Arpad: The transition between states is the hardest part - Walter: This should replace C_comp, not be an addition - It should be an external subckt - The nodes should be: - 1 Ground - 2 Rail voltage - 3 Pad IV side - 4 Pad Pad side - 5 Enable - IBIS can't really handle enable on/off - Mike L: agree - Arpad: agree - Mike L: How about a stimulus port for logic state dependence? - Walter: Agree, but circuits don't have to use it - Arpad: Maybe we should add features enable on/off accuracy to IBIS - Mike L: For example, [Enable Waveform] and [Disable Waveform] - Radek: This changes from simple C_comp to more complicated circuit - Why not model it with a non-linear capacitance? - Walter: Michael M showed this on one slide - Mike L: Tables are OK for V dependence, RC ladder for F dependence - Walter: Using a circuit avoids the need for more keywords - Todd: How would non-linear capacitance work? - Radek: We would create a charge vs. voltage model - Arpad: The fixed circuit proposed can model frequency dependency - Time domain simulators can't handle frequency models - Todd: This has to work in as many simulators as possible - Radek: Voltage dependency is needed too - Randy: Michael M proposed circuits selectable by voltage - Fangyi: Changing elements dynamically is hard for simulators - Arpad: The circuit shown works equally well in time and frequency domains - Arpad: Laplacian approaches have been tried: - One circuit obeyed charge conservation, one did not - Walter: Michael M was using voltage controlled R and C - Arpad: Not sure if they were voltage controlled - Walter: These are not LTI - A frequency based solution that is LTI might be desirable - Fangyi: We can have voltage dependent or frequency dependent, but not both - Arpad: We have to decide what it means to change C plates - Fangyi: Can expand C model into higher order derivative - i = C*dv/dt + C2*dv2/dt = ... - We can represent V dependence with a Laplacian - Bob: How do we get the coefficients? - It is not easy - Radek: We need to understand the problem we are modeling - Mike L: The "ribbon plot" on slide 13 shows the problem - Fangyi: A higher order model can represent anything - Arpad: Can we have a presentation on this? - Fangyi: Not sure how much can be done by next week - Walter: Is V on slide 13 pad V or rail V? - Arpad: It is pad V - Walter: There appears to be a huge change at 1MHz - V dependence is small - Radek: That appears to be a linear effect AR: Fangyi prepare presentation on high order C modeling Arpad: We still need to model state dependency - One model is a combination of series RC and parallel RC - May be able to dig up some material on this - Walter: We can't be sure that V dependency is a major factor AR: Arpad try to find material on series-parallel RC models Next meeting: 14 October 2008 12:00pm PT -----------